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Category Archives: fpga
The Hackaday Superconference is over, which is a shame, but one of the great things about our conference is the people who manage to trek out to Pasadena every year to show us all the cool stuff they’re working on. One of those people was [Piotr Esden-Tempski], founder of 1 Bit Squared, and he brought some goodies that would soon be launched on a few crowdfunding platforms. The coolest of these was the iCEBreaker, an FPGA development kit that makes it easy to learn FPGAs with an Open Source toolchain.
The hardware for the iCEBreaker includes the iCE40UP5K fpga with …read more
The Game Genie is a classic of the early 90s video game scene. It’s how you would have beaten the Ninja Turtles game, and it’s why the connector in your NES doesn’t work as it should. They never made a Game Genie for the Atari 2600, though, because by the time the Game Genie was released, the Atari was languishing on the bottom shelves of Toys R Us. Now though, we have FPGAs and development tools. We can build our own. That’s exactly what [Andy] did, and his Game Genie for the 2600 works as well as any commercial product …read more
Over on GitHub, [ttsiodras] wanted to learn VHDL. So he started with an algorithm to do Mandelbrot sets and moved it to an FPGA. Because of the speed, he was able to accomplish real-time zooming. You can see a video of the results, below.
The FPGA board is a ZestSC1 that has a relatively old Xilinx Spartan 3 chip onboard. Still, it is plenty powerful enough for a task like this.
The project doesn’t directly drive a display. It does the math, stores the results in the board’s onboard RAM and then sends a frame to the PC using the …read more
If you want to use FPGAs, you’ll almost always use an HDL like Verilog or VHDL. These are layers of abstraction just like using, say, a C compiler is to machine language or assembly code. There are other challenges to the throne such as SpinalHDL which have small but enthusiastic followings. [Tom] has a post about how the VexRISC-V CPU leverages SpinalHDL to make an extremely flexible system that is as efficient as plain Verilog. He says the example really shows off why you should be using SpinaHDL.
Like a conventional programming language, it is easy to find niche languages …read more
We reported earlier about Xilinx offering free-to-use ARM Cortex M1 and M3 cores. [Adam Taylor] posted his experiences getting things working and there’s also a video done by [Geek Til It Hertz] based on the material that you can see in the second video, below.
The post covers using the Arty A35T or Arty S50 FPGA boards (based on Artix FPGAs) and the Xilinx Vivado software. Although Vivado will allow you to do conventional FPGA development, it also can work to compose function blocks to produce CPUs and that’s really what’s going on here.
The final design has an M3 …read more
[Adam Taylor] always has interesting FPGA posts and his latest is no exception. He wanted to use a Zynq for image processing. Makes sense. You can do the high-speed parallel parts in the FPGA fabric and do higher-level processing on the built-in CPU. The problem is, of course, you need to get the video data into the system. [Adam] elected to use the Mobile Industry Processor Interface (MIPI) Camera Serial Interface Issue 2 (CSI-2).
This high-speed serial interface is optimized for data flowing in one direction. The camera, or the master, sends a number of bits (at least one) serially …read more
One of the ways people use FPGAs is to have part of the FPGA fabric hold a CPU. That makes sense because CPUs are good at some jobs that are hard to do with an FPGA, and vice versa. Now that the RISC-V architecture is available it makes sense that it can be used as an FPGA-based CPU. [Clifford Wolf] created PicoSOC — a RISC-V CPU made to work as a SOC or System on Chip with a Lattice 8K evaluation board. [Mattvenn] ported that over to a TinyFPGA board that also contains a Lattice FPGA and shows an example …read more
It’s the 21st century, and according to a lot of sci-fi movies we should have perfected AI by now, right? Well we are getting there, and this project from a group of Cornell University students titled, “FPGA kNN Recognition” is a graceful attempt at facial recognition.
For the uninitiated, the K-nearest neighbors or kNN Algorithm is a very simple classification algorithm that uses similarities between given sets of data and a data point being examined to predict where the said data point belongs. In this project, the authors use a camera to take an image and then save its histogram …read more
We were contacted by [morbo] to let us know about a project on the AdaCore blog that concerns programming a PicoRV32 RISC-V softcore with Ada. The softcore itself runs on a Lattice ICE40LP8K-based TinyFPGA-BX FPGA board, which we have covered in the past.
The blog post describes how to use the Community edition of the GNAT Ada compiler to set up the development environment, before implementing a simple example project that controls a strip of WS28212b RGB LED modules. There are two push buttons changing the animation and brightness of the lights.
The source can be found at the author’s …read more
It is no secret that we like the Lattice iCE40 FPGA. It has a cheap development board and an open source toolchain, so it is an easy way to get started developing low-cost, low-power FPGA designs. There are a few members of the family that have similar characteristics including the top-of-the-line UltraPlus. [Steve] from Lattice and [Michael Klopfer] from the University of California Irvine have a three-part video series that explain the architecture of the devices. Altogether, the videos are about an hour long and — of course — they use the official tools, not IceStorm. But it is still …read more