Category Archives: FPGA

Retrocomputing With Open Source FPGAs

A few years ago, we saw the reverse engineering of the Lattice iCE40 bitstream, opening the door to a completely Open Source development tool chain for FPGAs. This was an astonishing amount of work from [Clifford Wolf], [Mathias Lasser], and [Cotton Seed], but since then we haven’t seen a whole lot from Project IceStorm. Now, that’s about to change, and in the coolest way possible. [hoglet] is retrocomputing on an ICE40 development board.

This is an implementation of the Acorn Atom on a myStorm BlackIce board. This board is basically just a Lattice iCE40 FPGA, a few support components, and …read more

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Posted in acorn, Acorn Atom, FPGA, retrocomputing | Leave a comment

TinyFPGA is a Tiny FPGA Board

We recently noticed an open source design for TinyFPGA A-Series boards from [Luke Valenty]. The tiny boards measure 18 mm by 30.5 mm and are breadboard friendly. You can choose a board that holds a Lattice Mach XO2-256 or an XO2-1200, if you need the additional capacity.

The boards have the JTAG interface on the side pins and also on a top header that would be handy to plug in a JTAG dongle for programming. The tiny chips are much easier to work with when they are entombed in a breakout board like this. Bigger boards with LEDs and other …read more

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Posted in FPGA, ice, lattice | Leave a comment

VexRiscv: A Modular RISC-V Implementation for FPGA

Since an FPGA is just a sea of digital logic components on a chip, it isn’t uncommon to build a CPU using at least part of the FPGA’s circuitry. VexRiscv is an implementation of the RISC-V CPU architecture using a language called SpinalHDL.

SpinalHDL is a high-level language conceptually similar to Verilog or VHDL and can compile to Verilog or VHDL, so it should be compatible with most tool chains. VexRiscv shows off well in this project since it is very modular. You can add instructions, an MMU, JTAG debugging, caches and more.

When you build a CPU in FPGA, …read more

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Posted in cpu, custom cpu, FPGA, RISC-V, spinalhdl, verilog, vhdl | Leave a comment

Simulating the Learn-by-Fixing CPU

Last time I looked at a simple 16-bit RISC processor aimed at students. It needed a little help on documentation and had a missing file, but I managed to get it to simulate using a free online tool called EDA Playground. This time, I’ll take you through the code details and how to run the simulation.

You’ll want to refer to the previous post if you didn’t read it already. The diagrams and tables give a high-level overview that will help you understand the files discussed in this post.

If you wanted to actually program this on a real FPGA, …read more

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Posted in cpu, eda, eda playground, edaplayground, FPGA, Hackaday Columns, risc, simulation, Skills, verilog | Leave a comment

A Full Stack GPS Receiver

The usual way of adding GPS capabilities to a project is grabbing an off-the-shelf GPS module, plugging it into a UART, and reading the stream of NEMA sentences coming out of a serial port. Depending on how much you spend on a GPS module, this is fine: the best modules out there start up quickly, and a lot of them recognize the logical AND in ITAR regulations.

For [Mike], grabbing an off-the-shelf module is out of the question. He’s building his own GPS receiver from the ground up using a bit of hardware and FPGA hacking. Already he’s getting good …read more

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Posted in FPGA, gps, GPS receiver, GPS SDR, radio hacks, sdr | Leave a comment

Learn by Fixing: Another Verilog CPU

Because I often work with students, I’m always on the look-out for a simple CPU, preferably in Verilog, in the Goldilocks zone. That is, not too easy and not too hard. I had high hopes for this 16-bit RISC processor presented by [fpga4student], but without some extra work, it probably isn’t usable for its intended purpose.

The CPU itself is pretty simple and fits on a fairly long web page. However, the details about it are a bit sparse. This isn’t always a bad thing. You can offer students too much help. Then again, you can also offer too little. …read more

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Posted in cpu, eda, eda playground, edaplayground, FPGA, Hackaday Columns, risc, Skills, verilog | Leave a comment

Printer Scrap Becomes FPGA Devboard

These days, if you want to start learning about FPGAs, it can be a daunting experience. There’s a huge variety of different platforms and devboards and it can be difficult to know where to start. [RoGeorge] decided to take a different tack. Like a 16-year-old drag racer, he decided to run what he brung – a printer control panel cum FPGA development board (Romanian, get your Google Translate on).

[RoGeorge] was lucky enough to score a couple of seemingly defective control panels from HP Laserjets discarded by his workplace. Seeing potentially good parts going to waste, like keypads and LCDs, …read more

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Posted in devboard, development board, FPGA, HP, laserjet, printer, vhdl | Leave a comment

Adding IceZero To The Raspberry Pi

[Kevinhub] noticed there were quite a few FPGA hats for the Raspberry Pi. Instead going out and buying one of these boards like a filthy commoner, he decided to spin up his own FPGA Pi accessory. This IceZero FPGA board combines the best features from other FPiGA boards, and does it in a form factor that fits right on top of the minuscule Pi Zero.

If you think slapping a Lattice FPGA onto a Pi has been done before, you’re right. Here’s a hat for the Pi using an iCE5LP4K-SG48, an FPGA with 3520 LUTs. The CAT Board from Xess  …read more

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Posted in FPGA, iCE40, IceZero, pi zero, Raspberry Pi | Leave a comment

The Impressive Z80 Computer With The Unfortunate Name

We’ve seen a lot of retro builds around the Z80. Not many are as neatly done or as well-documented as [dekeNukem’s] FAP80 project. Before you rush to the comments to make the obvious joke, we’ll tell you that everyone has already made up their own variation of the same joke. We’ll also tell you the name is a cross between an old design from [Steve Ciarcia] called the ZAP80 and a reference to the FPGA used in this device.

[dekeNukem] says his goal was to create a Z80 computer without all the baggage of using period-correct support chips. You can …read more

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Posted in ARM, fap80, FPGA, Microcontrollers, retrocomputing, z80 | Leave a comment

Persistence Of Vision Death Star

Death Stars were destroyed twice in the Star Wars movies and yet one still lives on in this 168 LED persistence of vision globe made by an MEng group at the University of Leeds in the UK. While Death Stars are in high demand, they mounted it on an axis tilted 23.4° (the same as the Earth) so that they can show the Earth overlaid with weather information, the ISS position, or a world clock.

More details are available on their system overview page but briefly: rotating inside and mounted on the axis is a Raspberry Pi sending either video …read more

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Posted in commutator, death star, FPGA, led, LED controller, persistence of vision, POV, POV globe, Raspberry Pi | Leave a comment