Category Archives: verilog

Breathing LED Done with Raw Logic Synthesized from a Verilog Design

Breathing LEDs are an attractive adornment on many electronic devices. These days they’re typically controlled by software but of course there were fading effects back in the days of analog too. [Pepijn de Vos] mixes a little of the new and the old by building a hardware-based fader from a …read more

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Posted in breathing LED, led hacks, verilog | Leave a comment

Game Boy Recreated in Verilog

With the wide availability of Raspberry Pi hardware and pre-baked Linux distros with emulators ready to go, making a retro handheld is easier than ever. Emulation isn’t the only way to go about playing old games however. [Wenting Zhang] decided to instead recreate the Nintendo Game Boy in Verilog, and …read more

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Posted in fpga, game boy, Spartan, spartan fpga, spartan-6, verilog | Leave a comment

Old Game Development IDE Goes FPGA

If you have a thing for old game development — things like the Atari 2600 or similar period arcade games — you might already know about the 8bitworkshop IDE. There you can develop code in your browser for those platforms. In a recent blog post, the site announced you can now also do FPGA development in the IDE.

According to the site:

Most computers are fast enough to render a game at 60 Hz, which requires simulating Verilog at almost 5 million ticks per second.

To activate Verilog, you need to select the hamburger menu to the top left, select …read more

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FPGA Emulates a PDP-1, Breathes New Life Into Classic Video Game

If you’ve ever wanted to sit at the console of the machine that started the revolution in interactive computing, your options are extremely limited. Of the 53 PDP-1 machines that Digital Equipment Corporation made, only three are known to still exist, and just one machine is still in working order at the Computer History Museum. So a rousing game of Spacewar! on the original hardware is probably not something to put on your bucket list.

But thanks to [Hrvoje], there’s now an FPGA emulation of the PDP-1 that lets you play the granddaddy of all video games without breaking into …read more

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Posted in emulation, fpga, MiSTER, PDP-1, phosphor, pong, retrocomputing, spacewar, Terasic DE10-Nano, verilog | Leave a comment

VexRISC-V Exposed

If you want to use FPGAs, you’ll almost always use an HDL like Verilog or VHDL. These are layers of abstraction just like using, say, a C compiler is to machine language or assembly code. There are other challenges to the throne such as SpinalHDL which have small but enthusiastic followings. [Tom] has a post about how the VexRISC-V CPU leverages SpinalHDL to make an extremely flexible system that is as efficient as plain Verilog. He says the example really shows off why you should be using SpinaHDL.

Like a conventional programming language, it is easy to find niche languages …read more

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Posted in fpga, RISC-V, spinalhdl, verilog, vexrisc-v, vhdl | Leave a comment

Learn Verilog In Your Browser

We are big fans of tools in the browser for education. You have a consistent environment maintained by someone else, you don’t have to install anything, and you can work from any computer you happen to find yourself. The HDLBits site has a great set of Verilog “exams” that would be a big help to anyone trying to learn or brush up on their Verilog skills.

The site offers a range of topics that go from the silly (output a constant 1 or 0) to full-blown state machines and testbenches. The site isn’t tutorial in nature, instead it offers a …read more

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Visualizing Verilog Simulation

You don’t usually think of simulating Verilog code — usually for an FPGA — as a visual process. You write a test script colloquially known as a test bench and run your simulation. You might get some printed information or you might get a graphical result by dumping a waveform, but you don’t usually see the circuit. A new site combines Yosys and a Javascript-based logic simulator to let you visualize and simulate Verilog in your browser. It is a work in progress on GitHub, so you might find a few hiccups like we did, but it is still an …read more

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Pipelining Digital Logic in FPGAs

When you first learn about digital logic, it probably seems like it is easy. You learn about AND and OR gates and figure that’s not very hard. However, going from a few basic gates to something like a CPU or another complex system is a whole different story. It is like going from “Hello World!” to writing an operating system. There’s a lot to understand before you can make that leap. In this set of articles, I want to talk about a way to organize more complex FPGA designs like CPUs using a technique called pipelining.

These days a complex …read more

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Learn FPGA Programming from the 1940s

We often think that not enough people are building things with FPGAs. We also love the retrotechtacular posts on old computer hardware. So it was hard to pass up [karlwoodward’s] post about the Chip Hack EDSAC Challenge — part of the 2017 Wuthering Bytes festival.

You might recognize EDSAC as what was arguably the first operational computer if you define a computer as what we think of today as a computer. [Maurice Wilkes] and his team invented a lot of things we take for granted today including subroutines (Wheeler jumps named after a graduate student).

The point to the EDSAC …read more

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Posted in iCE40, lattice, paper tape, verilog, wuthering bytes | Leave a comment

VexRiscv: A Modular RISC-V Implementation for FPGA

Since an FPGA is just a sea of digital logic components on a chip, it isn’t uncommon to build a CPU using at least part of the FPGA’s circuitry. VexRiscv is an implementation of the RISC-V CPU architecture using a language called SpinalHDL.

SpinalHDL is a high-level language conceptually similar to Verilog or VHDL and can compile to Verilog or VHDL, so it should be compatible with most tool chains. VexRiscv shows off well in this project since it is very modular. You can add instructions, an MMU, JTAG debugging, caches and more.

When you build a CPU in FPGA, …read more

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Posted in RISC-V, spinalhdl, verilog, vhdl | Leave a comment